Rudolph Technologies has announced that a leading outsourced assembly and test facility (OSAT) has ordered Rudolph’s exclusive StepFAST Solution for panel-level packaging production, which includes a repeat order for the JetStep panel lithography system. Rudolph’s StepFAST Solution is a feed-forward adaptive shot technology that addresses process variations, die placement errors and dimensionally unstable materials that are common in existing and next-generation advanced packaging technologies. The elements included in the StepFAST Solution are Rudolph’s Firefly system for die position metrology, Discover software for advanced analytics, and the JetStep system for exposure.

“Uneven die placement on reconstituted panels, followed by die shift from the compression molding process, is a critical challenge for fan-out panel-level packaging,” said Alex Chow, vice president of strategic marketing. “Measuring the die placement prior to exposure is necessary to achieve overlay and yield thresholds, but measurement is not enough. Rudolph’s StepFAST Solution utilizes Discover software to analyze the error components and generate the appropriate correction file and exposure map for the JetStep lithography system to execute. Discover software automatically determines the optimal field size for exposure based on the overlay specifications and actual die placement error.”

“We are extremely grateful to have collaborated with this customer as they developed their ground-breaking panel packaging line using their first JetStep panel lithography system,” said Rich Rogoff, vice president and general manager of Rudolph’s Lithography Systems Group. “Their repeat order for a second JetStep panel system, which includes our StepFAST Solution, is a verification that our customers need complete solutions that provide a competitive advantage in the marketplace.”

The StepFAST Solution is exclusive to Rudolph Technologies and can double lithography throughput while providing 90% improvement on registration with feed-forward advanced process control. The Firefly system performs 2D defect inspection and die position metrology in a single pass, feeding critical metrology data to the Discover software engine to initiate the StepFAST Solution process. The method also provides a means to balance productivity (throughput) against yield, adding an extra dimension of flexibility for optimizing profitability. Systems and software are expected to ship in the fourth quarter.

TowerJazz and Vishay Siliconix has announced manufacturing portfolio expansion of existing and next-generation power semiconductor products for the automotive markets, to be produced in two of TowerJazz’s worldwide IATF16949 qualified manufacturing facilities. The newly developed automotive dedicated platforms will enable improved efficiency of power management circuitry in end products while reducing space requirements.

“With the ongoing increase of electronic content, automotive has been the main driver of growth in our industry. Ranking as Vishay Siliconix’s number one foundry while continuously supporting growing market activities, this expansion recognizes TowerJazz’s valuable continued commitment, exceptional technical and customer support, strong collaboration, and delivery performance,” said Serge Jaunay, Vishay MOSFET Division Head.

According to IC Insights, the automotive IC market reached record revenue of $32.3 billion in 2018 and is expected to remain the fastest growing IC market with a CAGR of 12.5%, exceeding $43 billion in 2021. This market is expected to be dominated by analog ICs, power management including power MOSFETs, visual and non-visual sensors, RF, and lighting.

Vishay Siliconix utilizes TowerJazz’s Transfer Optimization and development Process Services (TOPS) business unit for its world-leading low-and high-voltage power MOSFET products. These services provide best-in-class transfer methodologies, including the development of next-generation custom processes, technological capabilities with manufacturing capacity assurance and flexibility.

“We are excited to expand our long-term collaboration and business relationship with Vishay Siliconix, our highly valued customer and partner. The combination of both companies’ extensive technology expertise and market leadership, fosters an environment allowing mutual growth and success, enabling us to best serve Vishay Siliconix’s technological and operational needs”, said Zmira Shternfeld-Lavie, Senior Vice President and General Manager of Transfer, Optimization and development Process Services (TOPS) Business Unit.

Samsung Electronics has announced that its 5-nanometer (nm) FinFET process technology is complete in its development and is now ready for customers’ samples. By adding another cutting-edge node to its extreme ultraviolet (EUV)-based process offerings, Samsung is proving once again its leadership in the advanced foundry market.

Compared to 7nm, Samsung’s 5nm FinFET process technology provides up to a 25 percent increase in logic area efficiency with 20 percent lower power consumption or 10 percent higher performance as a result of process improvement to enable us to have more innovative standard cell architecture.

In addition to power performance area (PPA) improvements from 7nm to 5nm, customers can fully leverage Samsung's highly sophisticated EUV technology. Like its predecessor, 5nm uses EUV lithography in metal layer patterning and reduces mask layers while providing better fidelity.

Another key benefit of 5nm is that we can reuse all the 7nm intellectual property (IP) to 5nm. Thereby 7nm customers' transitioning to 5nm will greatly benefit from reduced migration costs, pre-verified design ecosystem, and consequently shorten their 5nm product development.

As a result of the close collaboration between Samsung Foundry and its 'Samsung Advanced Foundry Ecosystem (SAFE™)' partners, a robust design infrastructure for Samsung's 5nm, including the process design kit (PDK), design methodologies (DM), electronic design automation (EDA) tools, and IP, has been provided since the fourth quarter of 2018. Besides, Samsung Foundry has already started offering 5nm Multi Project Wafer (MPW) service to customers.

“In successful completion of our 5nm development, we’ve proven our capabilities in EUV-based nodes,” said Charlie Bae, Executive Vice President of Foundry Business at Samsung Electronics. “In response to customers' surging demand for advanced process technologies to differentiate their next-generation products, we continue our commitment to accelerating the volume production of EUV-based technologies.”

In October 2018, Samsung announced the readiness and its initial production of 7nm process, its first process node with EUV lithography technology. The company has provided commercial samples of the industry’s first EUV-based new products and has started mass production of 7nm process early this year.

Also, Samsung is collaborating with customers on 6nm, a customized EUV-based process node, and has already received the product tape-out of its first 6nm chip.

Mr. Bae continued, "Considering the various benefits including PPA and IP, Samsung's EUV-based advanced nodes are expected to be in high demand for new and innovative applications such as 5G, artificial intelligence (AI), high performance computing (HPC), and automotive. Leveraging our robust technology competitiveness including our leadership in EUV lithography, Samsung will continue to deliver the most advanced technologies and solutions to customers.”

Samsung foundry’s EUV-based process technologies are currently being manufactured at the S3-line in Hwaseong, Korea. Additionally, Samsung will expand its EUV capacity to a new EUV line in Hwaseong, which is expected to be completed within the second half of 2019 and start production ramp-up from next year.

ROHM recently announced the acquisition of a part of the diode and transistor business from Panasonic Semiconductor Solutions Company, a Group Company of Panasonic Corp.. The transfer is scheduled for October 2019 with ROHM handling sales of these products to Panasonic’s current customers thereafter.

Since the 1960s, ROHM has been developing, producing and selling semiconductor devices as a core business of the ROHM Group and has today the largest shares of the global markets for small signal transistors and diodes. Looking ahead, given the strong prospects of continuous growth in the automotive electronics, industrial equipment and other application markets, ROHM will be expanding its business in bipolar transistors, circuit protective Zener diodes, TVS diodes and other products. As a part of that, ROHM will proactively invest in a wide range of business resources in order to strengthen product lineups, further enhance product quality and ensure stable supplies. By acquiring the said business from Panasonic, ROHM aims to further expand its market share.

Details of the business acquisition

(1) Businesses handled by Panasonic Transistors (Bipolar, Built-in resistor, Junction field-effect)

Diodes (Schottky barrier, TVS, Zener, Switching, Fast recovery)

(2) To ensure a smooth transition and stable supplies to customers, ROHM will outsource production to Panasonic and maintain the exact same supply structure as before until the transfer is complete.

Going forward, both companies will be jointly preparing for the transfer of business, including obtaining all necessary approvals and permits. The transfer schedule details will be hammered out in the process.

EV Group (EVG) and Panasonic Smart Factory Solutions have announced that both companies have teamed up to provide a novel resist processing solution for plasma dicing that is developed for emerging applications, such as Internet of Things (IoT) sensors, MEMS, RFID, CMOS image sensors and thinned memories. This advanced solution, which incorporates the EVG 100 series of resist processing systems and Panasonic's APX300 Dicer Module plasma dicer, became available from March 13, 2019.

Plasma dicing enables highly parallel and high-throughput die singulation for small devices such as sensors, MEMS and RFID chips. It also provides debris- and particle-free die singulation to enable high process yields for CMOS image sensors, as well as damage-free and high-quality chip sidewalls for thinned memories.

Plasma dicing brings new pre-process requirements, including the need for thick resist coating (several dozen microns in thickness) on the wafer's surface prior to lithography or laser patterning processes to open up the dicing lanes. However, uniform protective coating of structures on the surface, such as multi-layer interconnections and bumps, is critical with traditional spin-coating techniques.

The EVG100 series of resist processing systems with EVG's proprietary OmniSpray technology enables conformal non-dependent to topography coating of surfaces and bumps across the wafer.

Panasonic has installed the EVG100 series in its Plasma Dicing Demonstration Center in Kadoma City, Osaka, Japan, to develop high-throughput and high-quality dicing solutions by leveraging its APX300 Dicer Module combined with the pre-processes of uniform resist coating on the bumps and subsequent patterning of dicing streets enabled by the EVG100 series.

EVG and Panasonic will begin providing this novel resist coating solution to improve dicing quality and productivity through customer demonstrations in the Plasma Dicing Demonstration Centre.

EPFL and MARVEL researchers have developed a new theory for heat conduction that can finally describe and predict the thermal conductivity of any insulating material.

Thermoelectric materials in particular hold vast potential for use in energy applications because they generate electricity from waste heat, such as that generated by industrial processes, by car and truck engines, or simply by the sun. Reducing the thermal conductivity of these materials by a factor of three, for example, would completely revolutionize existing waste-heat recovery, and also all refrigeration and air-cooling technology.

A unique theory for all insulating materials

In the paper Unified theory of thermal transport in crystals and glasses, out in Nature Physics, Michele Simoncelli, a PhD student at EPFL’s Theory and Simulation of Materials (THEOS) Laboratory – together with Nicola Marzari, a professor at EPFL’s School of Engineering and head of THEOS and of the MARVEL NCCR, and Francesco Mauri, a professor at the University of Rome–Sapienza – present a novel theory that finally decodes the fundamental, atomistic origin of heat conduction. Up to now, different formulations needed to be used depending on the systems studied (e.g., ordered materials, like a silicon chip, or disordered, like in a glass), and there wasn’t a unified picture covering all possible cases. This has now been made possible by deriving directly from the quantum mechanics of dissipative systems a transport equation that covers on equal footing diffusion, hopping, and tunneling of heat.

Waste heat recovery

This fundamental understanding will allow scientists and engineers to accurately predict the thermal conductivity of any insulating material (in metals, the heat is carried by the electrons, and that is well understood) – this is exceedingly important for thermoelectrics (i.e. materials that can convert heat into electricity), since these have both crystal- and glass-like properties, and are much needed for waste-heat recovery, or for refrigeration without greenhouse gases (and if you think refrigeration is boring, it is worth remembering that Albert Einstein spent many years trying to invent a new form of refrigerator).

In order to develop such next-generation technology, however, scientists first need to understand how and to what extent materials conduct heat. “Up to now, two different equations have been used for calculating thermal properties: one describes perfectly crystalline materials – that is, materials with highly ordered atomic structures – and the other one completely amorphous materials like glass, whose atoms do not follow an ordered pattern,” says Michele Simoncelli. These equations happened to work well in those special cases. “But between these two extremes lie a plethora of interesting cases, and neither equation worked – this is really where our contribution makes a profound difference”

Poor-quality organic semiconductors can become high-quality semiconductors when manufactured in the correct way.

The discovery that organic materials, such as polymers, can act as semiconductors led to a Nobel Prize in Chemistry in 2000. Since then, research within organic electronics has truly exploded, not least at Linköping University, which is home to world-leading research in the field.

Organic semiconductors, however, do not conduct current as efficiently as, for example, semiconductors of silicon or other inorganic materials. The scientists have discovered that one of the causes of this is the formation of traps in the organic materials in which the charge carriers get stuck. Several research groups around the world have been working hard to understand not only where the traps are located, but also how they can be eliminated.

Traps in organic semiconductors

“There are traps in all organic semiconductors, but they are probably a greater problem in n-type materials, since these are generally poorer semiconductors than p-type materials”, says Martijn Kemerink, professor of applied physics in the Division for Complex Materials and Devices at Linköping University.

Materials of p-type have a positive charge and the charge carriers consist of holes, while materials of n-type have charge carriers in the form of electrons, which gives the material a negative charge.

Martijn Kemerink and his colleagues at Linköping University have concluded that water is the villain in the piece. Specifically, the water is thought to sit in nanometre-sized pores in the organic material and is absorbed from the environment.

“In a p-type material the dipoles in the water align with their negative ends towards the holes, which are positively charged, and the energy of the complete system is lowered. You could say that the dipoles embed the charge carriers such that they cannot go anywhere anymore”, says Martijn Kemerink.

For n-type materials, the water orients the other way around, but the effect is the same, the charge is trapped. Experiments have been carried out in which the material is heated, to dry it out and cause the water to disappear. It works fine for a while, but the material subsequently re-absorbs water from the surrounding air, and much of the benefit gained by drying disappears.

Manufacture in a dry atmosphere

“The more water, the more traps. We have also shown that the drier the films can be manufactured, the better conductors they are. The theoretical work by Mathieu Linares quantitatively confirmed our ideas about what was going on, which was very satisfactory. Our article in Nature Materials shows not only how to get the water out, but also how to make sure that the water stays out, in order to produce an organic material with stable conductivity.”

In order to prevent the reuptake of water into the material once it has been dried, the scientists have also developed a way to remove the voids into which water molecules otherwise would have penetrated. This method is based on a combination of heating the material in the presence of a suitable organic solvent.

“Materials that were previously believed to be extremely poor semiconductors can instead become good semiconductors, as long as they are manufactured in a dry atmosphere. We have shown that dry-prepared materials tend to remain dry, while materials that are made in the presence of water can be dried. The latter are, however, extremely sensitive to water. This is true of the materials we have tested, but there’s nothing to suggest that other organic semiconducting materials behave differently”, says Martijn Kemerink.

General Rule for the Energy of Water-Induced Traps in Organic Semicondutors. Guangzheng Zuo, Mathieu Linares, Tanvi Upreti and Martijn Kemerink, Linköping University, Nature Materials 2019 DOI 10.1038/s41563-019-0347-y

Mobile technology has emerged as a primary engine of economic growth and transformed our everyday lives in a profound way. With each passing year, mobile technology’s spread throughout the world increases – through new types of electronic devices as well as new applications. Volume shipments of smartphones are expected to reach nearly 1.8 billion annually by 2021 [1]. Not surprisingly, global mobile traffic growth is also rising rapidly, with some estimates of traffic usage at 49 exabytes per month by 2021 [2]. These trends are leading to growing bandwidth demands and more crowded spectrum.

The migration from 3G to 4G and 4G LTE broadband wireless technologies has enabled multimegabit bandwidth, more efficient use of the radio network, latency reduction, and improved mobility – ultimately enabling faster download speeds. This in turn is driving a dramatic increase in the need for advanced filtering technologies, with some high-end, feature-rich phones today incorporating over 50 radio frequency (RF) filters [3]. The transition to 5G – driven not only by consumer demand for more graphic-processing-intensive applications such as augmented/virtual reality (AR/VR) but also the Internet of Things (IoT), the Tactile Internet, Industrial 2.0/IIoT, smart grid/energy and autonomous vehicles – will further drive new filter requirements [4]. These include different frequencies (and more of them), as well as steeper skirts in individual filter bands to reduce cross-talk between the bands and improve frequency accuracy.

RF filters need to be simultaneously smaller, cheaper and have increased functionality in order to support these growing requirements for consumer mobile devices. However, surface acoustic wave (SAW) filters are difficult to scale dimensionally due to the physical properties of the substrate material used to fabricate them. Opportunities at both the materials/substrate level as well as in packaging are emerging that can enable RF filter manufacturers to drive down RF filter costs and footprint as well as increase filter functionality. These are:

• The adoption of substrates with improved electrical properties such as lithium tantalate (LiTaO₃, also referred to as LTA) and lithium niobate (LiNbO₃, also referred to as LN) on silicon
• The adoption of wafer-level packaging to drive down costs, reduce footprint and increase device performance for improved robustness/protection from the elements or even for hermetic sealing

Wafer bonding plays an important role in enabling the integration of new materials like LTA and LN on silicon in SAW filter manufacturing. This article will explore several wafer bonding technologies that are needed for both substrate processing and packaging of LTA- and LN-on-silicon based SAW filters.

Wafer bonding considerations for new substrate combinations

Bulk LTA and LN substrates possess unique optical, piezoelectric and pyroelectric properties that make them valuable for SAW applications such as RF filters. However, LTA and LN are very expensive as well as brittle materials, which make them prone to breakage and yield loss. In addition, LTA and LN are anisotropic materials, which have different linear expansion coefficients in different directions. RF filters built with these materials have a temperature yield drift, which makes it very challenging for the filter to stay on the designated band. As a consequence, the filter chip has to be physically broad – with relatively wide spacing of the interdigitated finger structures deposited on the filter – in order to compensate for the temperature-related shift and remain on the designated band while maintaining good filtering properties with little to no signal degradation.

To address this thermal expansion and band drift problem, a thin layer of LTA or LN can be bonded onto a bulk silicon substrate, with the subsequent wafer stack processed, diced and packaged versus manufacturing RF filters on bulk LTA or LN substrates. Unlike LTA and LN, silicon is isotropic, whereby the substrate expands at the same rate in every direction. In a typical LTA-on-silicon stack, the LTA layer may be as thin as one micron or even less, while the silicon layer is 100 times thicker in the final filter. Representing the bigger component in the thermal expansion equation by far, the silicon stabilizes the thermal properties of the filter. This makes the filter less prone to reacting to temperature changes and parasitic effects. This allows the thickness of the filter and band selection to be made much narrower and more finely tuned, keeping the frequencies locked to a tighter band. This approach has additional cost and yield benefits. For example, since silicon is a much less expensive material compared to LTA and LN, the overall cost of the filter can be reduced. At the same time, silicon is a material that is already well understood in the wafer fab and easy to incorporate into a volume production environment.

Wafer bonding challenges

Direct wafer bonding is a bonding approach that enables the combining of two different materials with different lattices and coefficients of thermal expansion (CTEs) without any additional intermediate layers. The bonding process, which is based on chemical bonds between two surfaces that are established by elevating the temperature of the surfaces and applying pressure, can be used to enable LTA/LN on silicon. However, there are several key considerations with direct wafer bonding:

• Surface roughness: excessive roughness inhibits sufficient contact of the wafers, which leads to low bond strength or no bonding at all
• Cleanliness: particles on the wafer surface result in voids due to lack of surface contact in that region of the wafer
• CTE Mismatch: at high bonding temperatures, CTE mismatch introduces stress that results in wafer bow and can even lead to cracks

Current methods of manufacturing LTA and LN wafers are generally less sophisticated compared to silicon wafer manufacturing. For example, bright polishing is often used instead of chemical mechanical polishing (CMP), which is insufficient for properly conditioning the wafer’s surface prior to bonding. In addition, the CTE of the two materials differs significantly from silicon (by a factor of 3 in the case of LN, and by a factor of 4-6 depending upon direction in the case of LTA) [5]. As a result, even bonding at temperatures lower than 200°C results in cracks, which cause massive yield loss. However, treating the surface of the silicon substrate with plasma prior to bonding the LN/LTA layer allows the annealing temperature to be reduced to 100°C, which in turn eliminates voids and cracking (Figure 1). In addition, a pre-cleaning step prior to plasma activation can eliminate surface roughness and particles to ensure maximum bonding yield [6]. Plasma-activated wafer bonding thus provides an ideal process for manufacturing temperature-compensated SAW filters. Figure 2 illustrates a typical plasma-activated wafer bonding process flow.

Modularization drives new rf packaging requirements

Packaging has a very high impact on the size of RF filters. To support filter scaling, future packaging needs for RF filters (including those based on LTA and LN-on-silicon) are being driven by the industry trend toward “modularization”, where individual RF filter components are being bundled into filter bank modules rather than integrated individually. Whereas with the earliest cell phones, individual band filters would be used for different area codes and packaged separately, more recent models are incorporating modules that may encompass all area codes in a country or region. The resulting module is a discrete device, yet ends up being extremely bulky to cover all the functionality within.

Modularization is occurring as a result of a combination of factors, including industry consolidation and customer segmentation, which is driving wireless chipmakers to acquire component manufacturers as a means of gaining competitive advantage and greater market share. Recent examples include the formation of the Qualcomm-TDK joint-venture RF360, Avago’s acquisition of Broadcom, and the merger of RFMD and TriQuint resulting in the formation of Qorvo. This has led to the creation of the front-end module market with a few key players and preferred customers (handset device makers). For smart phone manufacturers, a major benefit of modularization is the fact that they can manage a single supplier. For the RF/wireless device manufacturer, the greatest benefit for the design winner is gaining a larger piece of the business. However, the reverse is true for the companies that lose out on the design win, as they are at risk of losing a greater share of the overall RF market.

Modularization is not simply packing more filters into a device, however. The filters themselves are also becoming more complex. For example, several different frequency bands are being manufactured on the same area on the same chip. Advanced wearables such as smartwatches with wireless connectivity have stringent footprint requirements and cannot afford to incorporate bulky filter modules. Smart phones also have stringent requirements when it comes to product thickness as well as improving energy efficiency. 

Scaling down the size of these packages through wafer-level chip-scale packaging (WLCSP) is critical to supporting these applications. WLCSP provides many benefits to RF filters:

• Smaller packaging - WLCSP requires no bond wires or interposers, which makes ultra-compact packaging possible
• Increased functional density - the smaller packaging compared to direct mounting on a printed circuit board enables smaller filter banks as well as filter stacking, which increases functional density
• Improved performance - Compensation for RF noise and temperature induced drift effects can be done in the package via dielectric strain buffers, which provides better signal quality for RF filters specifically
• Lower cost - WLCSP is a batch fabrication packaging process, which enables higher-volume manufacturing, which ultimately drives down per unit cost
• Hermetic packaging - WLCSP can cap the device wafer to protect the active area of the filter using a capping wafer, or by sealing a plane wafer with an additive structure on the capping wafer

Wafer bonding for RF WLCSP

In the case of SAW filters, a polymer frame surrounding the outside of the device is needed in order to create a cavity between the interdigital transducers (IDTs) that are fabricated on the surface of the LTA/LN substrate and the cap wafer. This allows for free movement of the acoustic waves across the top surface of the device wafer. The IDTs are simple lithographic finger structures that do not oxidize, and thus hermetic sealing is not needed. From this perspective, the design requirements of SAW filters are quite relaxed compared to Bulk Acoustic Wave (BAW) filters and many MEMS devices. As such, adhesive/polymer wafer bonding is an ideal bonding approach for SAW filters both from a technical and cost perspective. Figure 3a shows a typical SAW filter, while Figure 3b provides an overhead view of the inside of an adhesive wafer bonding chamber.

Adhesive bonding is a very simple process compared to other bonding approaches with fewer required wafer preparation steps, as shown in Figure 4. It is a low-temperature process (typically 200-300˚C), which requires less time to ramp up the temperature within the bond chamber. This results in higher bond chamber utilization and a faster bonding process. At the same time, the lower-temperature bond process allows for a wider variety of bonding materials to be used. Adhesive bonding also has a high tolerance for the underlying topography of the wafer, as well as relaxed requirements for overall surface quality and particle contamination.

When using a bulk LTA or LN substrate for SAW manufacturing, the cap wafer is composed of the same material to ensure CTE matching. With LTA- or LN-on-silicon substrates, however, the composition of the cap wafer is no longer limited to these more expensive substrates. Manufacturers have the freedom to use silicon or even glass substrates for the cap layer, which can significantly drive down the cost of manufacturing. Glass can also be bonded as a cap wafer at room temperature using ultraviolet (UV) wavelength.

Areas for future development

As we have discussed in this article, substrate property engineering is vitally important for temperature compensated SAW filters. In addition to low-temperature, thermally-activated adhesive bonding, adhesive research is also focusing more on photonic crosslinked adhesives due to the growing demand for photonic wafer bonding to enable the production of liquid crystal on silicon (LCOS) displays, photonic sensors and wafer-level optics (WLO). UV-based wafer bonding enables room-temperature bonding without any strain incorporation, as well as enables high-throughput processing and the possibility of encapsulating different materials and gases with accurate environmental control.

Summary

The growth in mobile data traffic as well as the growing trend of smart integration in mobile devices is driving greater demands in RF filter technology. SAW filters are both increasing in quantity as well as complexity in smart devices, resulting in modularization and consolidation, which is fundamentally changing the RF mobile communication market. New materials and packaging methods supported by wafer bonding in SAW filter manufacturing are needed to support these trends. Plasma-activated wafer bonding is an enabling technology for manufacturing SAW filters on new material combinations offering higher performance and lower cost such as lithium tantalate- and lithium niobite-on-silicon. When considering new packaging approaches such as WLCSP that offer greater density, improved performance, scalability and lower cost, adhesive bonding is the wafer bonding method of choice.

A pulse of ultrasound is speeding through a layer of copper at a speed around 4700 meters per second. As it moves, the pulse is mildly attenuated - meaning that it is gradually losing energy (amplitude). Suddenly it runs smack into a layer of cured epoxy. One portion of the pulse sails right across the interface between the two solids and keeps going into the epoxy. The other portion is reflected back, at the same speed with which it arrived, to the transducer that launched the pulse.

An x-ray beam travels through the same copper layer. Like the pulse of ultrasound, it is somewhat attenuated by the copper through which it is moving. When it runs into the wall of cured epoxy, the x-ray beam keeps right on moving; none of it is reflected. What does change is the rate of attenuation, because the beam is now traveling through a different material.

When both an x-ray system and an acoustic micro imaging tool are used on the same sample, examining both images can give information that can shed light on quality control or failure analysis questions. Neither energy form causes any physical damage to the part, and it is hard to think of a physical anomaly that can hide from both.

Because it is part of the electromagnetic spectrum, an x-ray beam’s velocity through a material is so high it requires no attention. When imaging a sample, the size of the beam fired from the x-ray tube expands as it moves. The x-y area of the image (magnification) is adjusted by changing the distance to the target.

The speed of ultrasound through a solid is many orders of magnitude less than the speed of an x-ray beam. A 100 MHz pulse, for example, moves through mold compound at about 3,000 meters per second. And ultrasound is launched not as a continuous beam, but as a pulse whose return echo represents an interface area measured in microns. The echo will become one pixel in the visible acoustic image. The transducer launches thousands of pulses per second as it scans, and, where there is an interface in the line of fire, collects thousands of echoes per second.

Figure 1 is the acoustic image of a plastic encapsulated microcircuit (PEM) made by a Nordson SONOSCAN C-SAM® acoustic micro imaging tool. The image was made by accepting for imaging echoes whose arrival times indicated that they originated in a vertical gate ranging from a short distance above the die face to the die attach level. Echoes originating above or below this gate were not accepted. The wires leading from the die to the lead fingers are within the gate, but they are very thin and have a circular cross section that scatters ultrasound. The result is that they reflect too little ultrasound at this frequency to be imaged.

Where no echoes were received (between the lead fingers, for example) the pixels are black. The color map along the left side of the image indicates that the echoes reflecting nearly all of the launched pulse are red. The circular red-yellow feature surrounding the die is a crack through the mold compound surrounding the die. The distal ends of most of the lead fingers are also red and yellow.

To the southeast of the circular crack is a curved black area that looks like an optical shadow - but this is an acoustic image. What happened is this: as the crack traveled upward, its path became more vertical. Where it is somewhat level, the crack reflects nearly all of the arriving pulse, and the crack is red. Where the crack becomes more vertical, the crack is yellow (the next color up on the color map at left). Where the path became even steeper, all of the pulse was deflected (echoed) at an angle and no echo was sent upward to the transducer, so the pixels in this area are black (no signal received).

An x-ray image of the same device was then made by a Nordson DAGE Quadra™ 7 tool and is shown in Figure 2. Ultrasound is reflected by material interfaces, but an x-ray beam sails right through interfaces. The large circular crack in Figure 1 has the solid-to-air interface that reflects virtually all of an ultrasonic pulse, but the crack itself, although lethal, is very thin. The crack cannot be discerned in Figure 2 because it is too thin to appreciably change the attenuation of the beam and thus the brightness of the image in this region.

The wires in the PEM shown in Figure 1 were then imaged separately by the Quadra 7 in a region where the wires are bonded to pads on the lead frame (Figure 3). What has happened is clear: the stresses set up by the expanding popcorn crack stretched the wires until they broke and became disconnected from the pads they had been bonded to. The resolution is high enough that details of the break can be seen, along with the wire’s former connection location on the pad.

In Figure 1, the resolution in the acoustic image is not sufficient to make the wires visible. At higher ultrasonic frequencies, if a pulse can penetrate the molding compound, wires are sometimes visible, but not in great detail.

Figure 4 is the x-ray image of a different device having a die that is eutectically bonded to a ceramic substrate. The lid has been removed to expose the bare die. There is no mold compound. The depth of interest was the die attach, where there may be voids in the eutectic that are efficient blockers of heat radiating from the die. 

What this x-ray image reveals is that there are hundreds of voids of different sizes where material is missing, all likely formed when the die was put in place and bonded to the substrate. Some of the voids are extremely tiny. They are visible here because the absence of eutectic material results in reduced attenuation of the x-ray beam.

At the lower left corner is a very large area where there is no eutectic material, although there are traces of die attach material along the upper right margin of the area. In general, voids in eutectic bonds can form in one of two ways: either the eutectic material melts and flows away, or the pressure applied is not sufficient to make a bond. If the eutectic material is present but did not form a bond, then x-ray will not detect this condition. This large void was probably formed by the melting and subsequent migration of the eutectic material.

The same device is imaged acoustically in Figure 5. Far more voids - and especially tiny voids - are visible here than in the x-ray image. Many voids appear white because they are large enough - even if their overall shape is somewhat spherical - to reflect enough of the pulse to create a visible group of white pixels. Voids smaller than these simply scatter nearly all of the arriving pulse and are black in this acoustic image. Both of the largest voids, which in the x-ray image displayed some internal structure, show no structure here because essentially all of the pulse is reflected by the solid-to-air interface and none enters the void itself.

Figure 5: Acoustic image of the same device

A small area near the center of Figure 5 is shown magnified in Figure 6, where it can be seen that even some of the smallest voids have brightly reflecting centers.

Other differing capabilities make it useful to use both x-ray and ultrasound to interrogate a sample. Both are attenuated by solid materials they pass through, but not to the same degree. Ultrasound is rapidly attenuated by materials that are easily deformed, such as polymers, but is far less rapidly attenuated by a material such as ceramic. X-ray is more rapidly attenuated by materials of high density. The metal substrate of an IGBT module, for example, easily transmits ultrasound in order to image internal features, but may absorb an x-ray beam before the beam can effectively image the low-contrast detail.

When it is critical to characterize a suspected internal structural anomaly as fully as possible, using both x-ray and ultrasound is likely to produce much more comprehensive and diagnosable data. X-ray may miss a very thin but critical gap, but ultrasound will find it. Ultrasound may miss a void that is below multiple interfaces, but x-ray will find it. The combined impact of the two complementary tools on product quality is considerable.